Constructing The NOT Function

As you can see, there are two ways to use a NAND gate as an inverter, and two ways to use a NOR
gate as an inverter. Either method works, although connecting TTL inputs together increases the
amount of current loading to the driving gate. For CMOS gates, common input terminals decreases
the switching speed of the gate due to increased input capacitance.

Inverters are the fundamental tool for transforming one type of logic function into another, and
so there will be many inverters shown in the illustrations to follow. In those diagrams, I will only
show one method of inversion, and that will be where the unused NAND gate input is connected to
+V (either Vcc or Vdd, depending on whether the circuit is TTL or CMOS) and where the unused
input for the NOR gate is connected to ground. Bear in mind that the other inversion method
(connecting both NAND or NOR inputs together) works just as well from a logical (1's and 0's)

point of view, but is undesirable from the practical perspectives of increased current loading for TTL
and increased input capacitance for CMOS.